Title:
【発明の名称】ビタビ復号器のための高速メトリック計算
Document Type and Number:
Japanese Patent JP2002521907
Kind Code:
A
Abstract:
A method and apparatus are used for determining a metric in a decoding algorithm, such as a Viterbi algorithm, using an n-bit processing module, on the basis of plural m-bit soft input words, wherein n>=2xm. The technique comprises: receiving plural m-bit soft input words; assembling at least two of the plural m-bit soft input words into a single n-bit composite soft input word; computing the respective distances between the at least two soft input words in the composite soft input word and expected codeword values to produce a composite distance word; summing the respective distances together to produce the metric; and extracting the metric. The n-bit processing module may comprise a 16-bit processing module employing 16-bit words, and the m-bit soft input words may each comprise a 4-bit word. Processing the plural soft input words en bloc increases the speed and information transfer rate of the decoder, and reduces the memory requirements of the decoder.
Inventors:
Piermeyer, Stephan
Application Number:
JP2000561709A
Publication Date:
July 16, 2002
Filing Date:
July 15, 1999
Export Citation:
Assignee:
Telefon Acty Bora Get Elm Ericsson (Pubble)
International Classes:
G06F11/10; H03M13/41; (IPC1-7): H03M13/41; G06F11/10
Attorney, Agent or Firm:
Yasunori Otsuka (3 others)