Title:
【発明の名称】マトリックス表示パネルの駆動回路及び装置
Document Type and Number:
Japanese Patent JP2002528773
Kind Code:
A
Abstract:
In a driver circuit ( 1 ) for a matrix display with pixels (Pij) associated with cross points of data electrodes (DEj) and select electrodes (SEi), data signals (DSj) are supplied by the data driver ( 12 ) to the data electrodes (Dej) to store data voltages in pixels (Pij) associated with a selected one of the select electrodes (SEi). A bias circuit ( 13 ) increases a bias current (IB) of the data driver ( 12 ) only when an edge of at least one of the data signals (DSj) occurs or is expected to occur. The bias current (IB) is selected to be very small if no edge of the data signal (DSj) occurs or is expected to occur, and the power dissipation in the data driver ( 12 ) will be lowered. If no edge occurs or is expected to occur, the bias current (IB) has a low value during the whole select time (also referred to as address time) of a row (Ri) of pixels (Pij). If an edge occurs, there are several possibilities to allow the required short duration of the data setup time: the bias current (IB) has a high value during the whole select time of a row (Ri), or only during the data setup period.
Inventors:
Roy, Fan Dyke
Application Number:
JP2000578802A
Publication Date:
September 03, 2002
Filing Date:
October 05, 1999
Export Citation:
Assignee:
Konin Krekka Philips Electronics NV
International Classes:
G09G3/20; G09G3/36; (IPC1-7): G09G3/36; G09G3/20
Attorney, Agent or Firm:
Tadahiko Ito