Title:
【発明の名称】単一ポインタを有するFIFOユニット
Document Type and Number:
Japanese Patent JP2002533857
Kind Code:
A
Abstract:
A FIFO unit for buffering serial communications includes a register and a unit for maintaining a single pointer. The single pointer functions as an IN pointer during writes and an OUT pointer during reads. The same circuitry maintains the pointer for both reads and writes to the FIFO. This circuitry preferably includes a single counter. If an error occurs during reading, the single pointer can be reinitialized and reading restarted, without loss of data. The register is not erased until reading is complete.
Inventors:
Zee, Zeng
William, W. Corb
Haltomut, Kay. Haven
William, W. Corb
Haltomut, Kay. Haven
Application Number:
JP2000590037A
Publication Date:
October 08, 2002
Filing Date:
December 06, 1999
Export Citation:
Assignee:
Konin Krekka Philips Electronics NV
International Classes:
G06F5/06; G06F5/10; H04L13/08; G11C7/00; (IPC1-7): G11C7/00; G06F5/06; H04L13/08
Attorney, Agent or Firm:
Kazuo Sato (3 others)