Title:
【発明の名称】チップ-キャリア複合体
Document Type and Number:
Japanese Patent JP2002543012
Kind Code:
A
Abstract:
The chip-carrier combination (1) has a semiconducting chip (2) embedded in a thin carrier material (3). The chip is accommod in an aperture (4) in the carrier material that is covered on at least one side of the chip by a covering pad (5) whose edge reg (6) are attached to the carrier material. The chip is attached to the covering pad.
Inventors:
Robert Rainer
Application Number:
JP2000615963A
Publication Date:
December 17, 2002
Filing Date:
April 06, 2000
Export Citation:
Assignee:
Infineon Technologies Akchen Gesell Shaft
International Classes:
G06K19/00; G06K19/077; B65D73/02; (IPC1-7): B65D73/02
Attorney, Agent or Firm:
Shusaku Yamamoto