Title:
【発明の名称】過電圧保護回路
Document Type and Number:
Japanese Patent JP2002544752
Kind Code:
A
Abstract:
A 0-10V dimming interface protection circuit generating an indication that line voltage is applied across first and second leads of the dimming interface controlling light output by a lamp, includes a first device for limiting current serially connected between a line voltage source and the first lead of the dimming interface, a second device connected across the first and second leads for detecting application of line voltage to the dimming interface and for generating a control signal, and a third device for switching, operated in response to the control signal, for causing an increase in resistance of the first device to thereby limit current to the dimmer interface and limit light output by the lamp. According to one aspect of the invention, the protection circuit also includes a fourth device for preventing spurious operation of the second device.
Inventors:
Michael Iglec Chan
Adan Hernandez
Sule Raman Venkita Sabura Manian
Adan Hernandez
Sule Raman Venkita Sabura Manian
Application Number:
JP2000617536A
Publication Date:
December 24, 2002
Filing Date:
April 25, 2000
Export Citation:
Assignee:
Konin Krekka Philips Electronics NV
International Classes:
H02H9/04; H02H3/20; H02H9/02; H05B41/285; H05B41/392; H02H3/02; (IPC1-7): H02H9/04; H02H9/02
Attorney, Agent or Firm:
Sugimura Kosaku (1 person outside)