Title:
半導体構成素子の製造方法並びにその方法により製造された半導体構成素子
Document Type and Number:
Japanese Patent JP2004502555
Kind Code:
A
Abstract:
The multilayer semiconductor circuit (100) has a substrate (101) made of silicon. A first porous layer (104) is formed in the central part of the top surface of the substrate. A cavity may be formed under this porous layer, and the cavity may have an external opening to provide access. A second porous layer (105) may be formed under the first, with larger pores. A masking layer (102) may be formed on either side of or surrounding the porous layers.
Inventors:
Hubert Benzel
Heli belt weber
Hans Altman
Frank shafer
Heli belt weber
Hans Altman
Frank shafer
Application Number:
JP2002507720A
Publication Date:
January 29, 2004
Filing Date:
April 20, 2001
Export Citation:
Assignee:
ROBERT BOSCH GMBH
International Classes:
G01L9/00; B81B3/00; B81C1/00; H01L21/306; H01L29/84; (IPC1-7): B81C1/00; G01L9/00; H01L29/84
Domestic Patent References:
| JPH07115209A | 1995-05-02 | |||
| JPH0837314A | 1996-02-06 | |||
| JPH11195562A | 1999-07-21 | |||
| JPH0590113A | 1993-04-09 | |||
| JPH08111533A | 1996-04-30 | |||
| JPH11102893A | 1999-04-13 |
Foreign References:
| CN1251945A | 2000-05-03 | |||
| WO1999045583A1 | 1999-09-10 |
Attorney, Agent or Firm:
Toshio Yano
Toshiomi Yamazaki
Takuya Kuno
Einzel Felix-Reinhard
Reinhard Einsel
Toshiomi Yamazaki
Takuya Kuno
Einzel Felix-Reinhard
Reinhard Einsel