Title:
デジタルデバイス用改良型高速データキャプチャ回路
Document Type and Number:
Japanese Patent JP2004534420
Kind Code:
A
Abstract:
A data capture circuit for an integrated circuit is disclosed which includes providing respective data paths between a latch and clock terminal and a latch and an associated data terminal, the length of each of the paths for a given latch device being approximately equal.
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Inventors:
Brent Keith
Chris G. Martin
Chris G. Martin
Application Number:
JP2002568187A
Publication Date:
November 11, 2004
Filing Date:
February 01, 2002
Export Citation:
Assignee:
MICRON TECHNOLOGY,INCORPORATED
International Classes:
G06F1/10; G06F7/00; G06F12/00; G06F13/16; G11C11/407; H01L21/822; H01L27/04; H03K5/15; (IPC1-7): H03K5/15; G06F1/10; G11C11/407; H01L21/822; H01L27/04
Attorney, Agent or Firm:
Yoshikazu Tani
Kazuo Abe
Kazuo Abe