Title:
パーソナルコンピュータシステムにおいて裏口アクセス機構を閉鎖するための機構
Document Type and Number:
Japanese Patent JP2005501313
Kind Code:
A
Abstract:
Methods, devices, and systems for closing back door access mechanisms. A processor includes a first register configured to store one or more hardware-debug-test (HDT) enable bits, a first control logic coupled to receive a plurality of HDT input signals, and a second control logic coupled to the first register. The first control logic is coupled to access the first register. The second control logic is configured to store one or more default values in the first register in response to a reset of the processor. Another processor includes a first control logic coupled to receive a plurality of microcode inputs, a first register coupled to the first control logic, and a second control logic coupled to the first register. The first register is configured to store one or more microcode loader enable bits. The second control logic is configured to store one or more default values in the first register in response to a reset of the processor.
Inventors:
Jeffrey S. Stronzine
Application Number:
JP2002589946A
Publication Date:
January 13, 2005
Filing Date:
April 17, 2002
Export Citation:
Assignee:
ADVANCED MICRO DEVICES INCORPORATED
International Classes:
G06F1/00; G06F9/24; G06F9/30; G06F11/22; G06F21/60; G06F11/30; G06F12/14; G06F13/24; G06F21/62; G06F21/79; G06F21/85; H04K1/00; (IPC1-7): G06F12/14; G06F9/30; G06F11/22
Attorney, Agent or Firm:
Masatake Suzuki
Ryota Sano
Yoshito Muramatsu
Ryota Sano
Yoshito Muramatsu