Title:
電界効果トランジスタ、その使用、およびその製造方法
Document Type and Number:
Japanese Patent JP2005538537
Kind Code:
A
Abstract:
Field effect transistor comprises a doped channel region arranged along a recess (72), a doped connecting region (16) arranged close to an opening of the recess, a doped connecting region (18) arranged away from the opening, a control region (172) arranged in the recess, and an electrical insulating region (170) arranged between the control region and the channel region. The connecting region (18) leads to a surface containing the opening or is connected to a connection leading to the opening. An Independent claim is also included for a process for the production of the field effect transistor.
Inventors:
Kakoshke, Ronald
Thefts, Helmut
Thefts, Helmut
Application Number:
JP2004528310A
Publication Date:
December 15, 2005
Filing Date:
June 12, 2003
Export Citation:
Assignee:
Infineon Technologies AG
International Classes:
H01L21/336; H01L21/8247; H01L27/115; H01L29/78; H01L29/788; H01L29/792; H01L27/10; (IPC1-7): H01L29/78; H01L21/8247; H01L27/10; H01L27/115; H01L29/788; H01L29/792
Domestic Patent References:
| JPH03145761A | 1991-06-20 | |||
| JPH10107280A | 1998-04-24 | |||
| JPH0529560A | 1993-02-05 | |||
| JPH04226075A | 1992-08-14 | |||
| JP2000049245A | 2000-02-18 | |||
| JPH10290007A | 1998-10-27 | |||
| JP2003526948A | 2003-09-09 | |||
| JP2003536241A | 2003-12-02 |
Attorney, Agent or Firm:
Hidesaku Yamamoto
Takaaki Yasumura
Natsuki Morishita
Takaaki Yasumura
Natsuki Morishita