Title:
2つの制御領域を有する集積された電界効果トランジスタ、その使用、およびその製造方法
Document Type and Number:
Japanese Patent JP2006500786
Kind Code:
A
Abstract:
A method for fabricating a field-effect transistor is provided. The method includes forming a substrate region, forming two terminal regions at the substrate region, one terminal region being a source region and the other terminal region being a drain region, forming two electrically insulating insulating layers, which are arranged at mutually opposite sides of the substrate region and are adjoined by control regions, forming an electrically conductive connecting region, which electrically conductively connects one of the terminal regions and the substrate region the conductive connecting region comprising a metal-semiconductor compound, leveling a surface by chemical mechanical polishing after forming the control regions, etching-back the control regions after polishing, and performing a self-aligning method for forming the metal-semiconductor compound in the etched-back regions, on the substrate region, and on a terminal region.
Inventors:
Kakoshke, Ronald
Application Number:
JP2004540489A
Publication Date:
January 05, 2006
Filing Date:
September 19, 2003
Export Citation:
Assignee:
Infineon Technologies AG
International Classes:
H01L29/786; G11C16/06; H01L21/336; H01L21/8247; H01L21/84; H01L27/115; H01L27/12; H01L29/788; H01L29/792
Domestic Patent References:
| JPH0575127A | 1993-03-26 |
Attorney, Agent or Firm:
Hidesaku Yamamoto
Takaaki Yasumura
Natsuki Morishita
Takaaki Yasumura
Natsuki Morishita