Title:
パイプラインプロセスステージの制御システムおよび制御方法
Document Type and Number:
Japanese Patent JP2006505060
Kind Code:
A
Abstract:
An embodiment of the present invention includes a pipeline comprising a plurality of stages and a pipeline timing controller controlling a plurality of predetermined delays, wherein, when one of the predetermined delays has expired, the pipeline timing controller sends a control signal to initiate at least one process within associated ones of the plurality of stages.
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Inventors:
Shyle A. Gupta
Mukhand Shibaraman
Mukhand Shibaraman
Application Number:
JP2004550015A
Publication Date:
February 09, 2006
Filing Date:
October 10, 2003
Export Citation:
Assignee:
Hewlett-Packard Development Company
International Classes:
G06F9/38
Attorney, Agent or Firm:
Patent Business Corporation IPS