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Title:
データ値の多次元アレイへのパラレルなアクセスを提供するデータ処理装置
Document Type and Number:
Japanese Patent JP2007534077
Kind Code:
A
Abstract:
An array of data values, such as an image of pixel values, is stored in a main memory (12). A processing operation is performed using the pixel values. The processing operation defines time points of movement of a multidimensional region (20, 22) of locations in the image. Pixel values from inside and around the region are cached for processing. At least when a cache miss occurs for a pixel value from outside the region, cache replacement of data in cache locations (142) is performed. Locations that store pixel data for locations in the image outside the region (20, 22) are selected for replacement, selectively exempting from replacement cache locations (142) that store pixel data locations in the image inside the region. In embodiments, different types of cache structure are used for caching data values inside and outside the region. In an embodiment the cache locations for pixel data inside the regions support a higher level of output parallelism than the cache locations for pixel data around the region. In a further embodiment the cache for locations inside the region contains sets of banks, each set for a respective line from the image, data from the lines being distributed in a cyclically repeating fashion over the banks.

Inventors:
Seturaman, Ramanathan
Berwick, Alexander
Alba pinto, carlos aur
Peters, Harum Yehr Aem
Muwisen, Patrick PA
Srinivasan, Balakrishnan
Feldman, Herald
Application Number:
JP2007509048A
Publication Date:
November 22, 2007
Filing Date:
April 21, 2005
Export Citation:
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Assignee:
Koninklijke Philips Electronics N.V.
International Classes:
G06T1/60; H04N7/26; G06F12/0862; G06F12/126
Domestic Patent References:
JPH02101589A1990-04-13
JPH1188866A1999-03-30
JPH09319657A1997-12-12
JPH07219847A1995-08-18
Attorney, Agent or Firm:
Tadahiko Ito
Shinsuke Onuki
Tadashige Ito