Title:
スズリッチ堆積層を有する電子部品及びスズリッチ堆積層を堆積させるためのプロセス
Document Type and Number:
Japanese Patent JP2008506038
Kind Code:
A
Abstract:
The invention relates to an electronic component with Sn rich deposit layer on the part for electric connection, wherein the Sn rich deposit layer is a fine grained Sn rich deposit layer composed of grains with smaller size in the direction perpendicular to the deposit surface than in the direction parallel to the deposit surface. It also relates to a process for plating an electronic component, so as to form a Sn rich deposit layer on the part for electric connection, comprising the steps of: adjusting the composition of tin plating solution in which starter additive and brighter additive are included; moving the electronic component through the tin plating solution, so as to form a fine grained Sn rich deposit layer on the part for electric connection. As compared with the prior art, the invention can validly inhibit the whisker growth with low cost and reliable property.
Inventors:
Yu, Chenfu
Chen, Chia-Chun
Pascal, Oberndorf
Shee, Kar-Chan
Chen, Chia-Chun
Pascal, Oberndorf
Shee, Kar-Chan
Application Number:
JP2007519942A
Publication Date:
February 28, 2008
Filing Date:
July 04, 2005
Export Citation:
Assignee:
Koninklijke Philips Electronics N.V.
International Classes:
C25D7/00; C25D3/32; C25D3/60; C25D5/10
Attorney, Agent or Firm:
Kenji Yoshitake
Hidetoshi Tachibana
Yasukazu Sato
Hiroshi Yoshimoto
Yasushi Kawasaki
Takahashi
Hidetoshi Tachibana
Yasukazu Sato
Hiroshi Yoshimoto
Yasushi Kawasaki
Takahashi