Title:
算術/論理演算ツリーの計算
Document Type and Number:
Japanese Patent JP2008524691
Kind Code:
A
Abstract:
A method of computing at least a first and a second tree of arithmetic or logical operations on a microprocessor comprising at least n parallel processing elements. The method comprises: a) executing (in 48) n arithmetic or logical operations of a first iteration of the first tree in parallel using the n processing elements, then b) executing (in 66) m arithmetic or logical operations in parallel between the results of the first iteration, using m processing elements chosen from the n processing element used for the computation of the first iteration, the other n−m processing element being unused for the computation of the second iteration. In parallel with the computation of the second iteration of the first tree, the method comprises executing (in 66) k arithmetic or logical operations of the second tree in parallel using k processing elements chosen from the n−m processing elements unused for the computation of the second iteration of the first tree.
Inventors:
Burno ballarin
Application Number:
JP2007546274A
Publication Date:
July 10, 2008
Filing Date:
December 13, 2005
Export Citation:
Assignee:
NXP B.V.
International Classes:
G06F15/80
Domestic Patent References:
| JPH1166033A | 1999-03-09 | |||
| JPH06309285A | 1994-11-04 | |||
| JPH01147767A | 1989-06-09 |
Attorney, Agent or Firm:
Kenji Sugimura
Tatsuya Sawada
Tatsuya Sawada