Title:
プログラム可能信号損失検出ハードウェアおよび方法
Document Type and Number:
Japanese Patent JP2008526172
Kind Code:
A
Abstract:
A loss of signal assert and de-assert level programming mechanism in an optical transceiver coupled to a host computing system. A control module is connected to the host so as to receive the programmable loss of signal level. A post-amplifier detects when the receive power drops below a loss of signal level. However, in this case, instead of the loss of signal level being static, a loss of signal level adjustment mechanism changes the loss of signal level detected by the post-amplifier as directed by the programmable loss of signal level received from the host. The loss of signal assert and de-assert levels may be calibrated by comparing receive power to the threshold for assertion and de-assertion of the loss of signal.
Inventors:
Stuart, James
Eh, Anthony
Hosking, Lucy
Eh, Anthony
Hosking, Lucy
Application Number:
JP2007549586A
Publication Date:
July 17, 2008
Filing Date:
December 29, 2005
Export Citation:
Assignee:
FINISAR CORPORATION
International Classes:
H04B10/08; H04B10/04; H04B10/06; H04B10/14; H04B10/26; H04B10/43
Attorney, Agent or Firm:
Hironobu Onda
Makoto Onda
Makoto Onda