Title:
他ビットのプログラマブル分周器
Document Type and Number:
Japanese Patent JP2008545320
Kind Code:
A
Abstract:
A multi-bit, programmable, modular digital frequency divider divides an input frequency by an m-bit integer divisor to produce an output frequency. The integer divisor re-initializes m-number of flip-flop stages with the divisor input at the end of every output clock. Each divisor bit is gated to a D-input through a respective data multiplexer controlled by a clock output. A run/initialize mode controller receives the input frequency and produces the divided output frequency and controls the timing of the re-initialization.
More Like This:
JPH01120910 | FREQUENCY DIVIDER CIRCUIT |
Inventors:
Song Wen Yi
Haetyan Jordens
Haetyan Jordens
Application Number:
JP2008519119A
Publication Date:
December 11, 2008
Filing Date:
June 30, 2006
Export Citation:
Assignee:
Koninklijke Philips Electronics N.V.
International Classes:
H03K21/00; H03K23/64
Domestic Patent References:
JPH0270123A | 1990-03-09 | |||
JPH0270123A | 1990-03-09 |
Foreign References:
US20030208513A1 | 2003-11-06 | |||
US20030208513A1 | 2003-11-06 |
Attorney, Agent or Firm:
Kenji Sugimura
Kosaku Sugimura
Kiyoshi Kuruma
Shiro Fujitani
Tatsuya Sawada
Eiji Fujiwara
Kosaku Sugimura
Kiyoshi Kuruma
Shiro Fujitani
Tatsuya Sawada
Eiji Fujiwara