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Title:
成形密着性を向上させたパッケージ化電子デバイス用リードフレーム
Document Type and Number:
Japanese Patent JP2011517113
Kind Code:
A
Abstract:
A packaged electronic device (20) includes a die pad (30), leads (32) arranged around the die pad (30), and a die (24) attached to an upper surface (34) of the die pad (30) and electrically connected to the leads (32). A packaging material (28) encapsulates the die pad (30), the die (24), and the leads (32). The die pad (30) includes indentations (42) formed in the upper surface (34) along a sidewall (38) of the die pad (30). The die pad (30) further includes indentations (44) formed in a lower surface (36) of the die pad (30) along the sidewall. The packaging material (28) fills the indentations (42, 44) thereby promoting adhesion between the die pad (30) and the packaging material (28) so that the die pad (30) and packaging material (28) cannot readily delaminate.

Inventors:
Hooper, Stephen Earl.
McDonald, James D.
Shamway, Russell S.
Application Number:
JP2011504022A
Publication Date:
May 26, 2011
Filing Date:
February 13, 2009
Export Citation:
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Assignee:
Freescale Semiconductor, Inc.
International Classes:
H01L23/50
Domestic Patent References:
JP2004522297A2004-07-22
JP2000269401A2000-09-29
JPH08172145A1996-07-02
JP2004522297A2004-07-22
JP2000269401A2000-09-29
Attorney, Agent or Firm:
Atsushi Honda
Miho Ikegami