Title:
FLATTENING TREATMENT METHOD OF SILICON WAFER
Document Type and Number:
Japanese Patent JP2018141188
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a flattening treatment method of a silicon wafer employing an anodizing method, capable of uniformly flattening the whole face of a silicon wafer in a shorter time to form a reference face on one main face of a silicon wafer.SOLUTION: The flattening treatment method of a silicon wafer comprises: a step of anodizing one main face of a silicon wafer W, using the silicon wafer as an anode and a flattening electrode 4 having a larger exterior dimension relative to the silicon wafer as a cathode, by causing the flattening electrode to face or contact one main face of the silicon wafer and applying voltage thereto to form a porous silicon layer PS over the unevenness of the surface of the one main face of the silicon wafer; a step of removing the porous silicon layer PS by bringing the flattening electrode 4 into contact with the whole of the one main face of the silicon wafer; and a reference face forming step of forming a reference face on the one main face of the silicon wafer by flattening the surface of the one main face of the silicon wafer by concurrently carrying out the step of anodizing one main face of the silicon wafer and the step of removing the porous silicon layer PS or by sequentially repeating the two steps.SELECTED DRAWING: Figure 4
Inventors:
ARAKI KOJI
SUDO HARUO
SHIMADA JUICHI
KOSHIDA NOBUYOSHI
HITSUPOU TAIHEI
SUDO HARUO
SHIMADA JUICHI
KOSHIDA NOBUYOSHI
HITSUPOU TAIHEI
Application Number:
JP2017034773A
Publication Date:
September 13, 2018
Filing Date:
February 27, 2017
Export Citation:
Assignee:
GLOBALWAFERS JAPAN CO LTD
International Classes:
C25F3/30; H01L21/306; H01L21/3063
Domestic Patent References:
| JPS4326819B1 | ||||
| JPS62136030A | 1987-06-19 | |||
| JP2015162600A | 2015-09-07 |
Attorney, Agent or Firm:
Kinoshita Shigeru
Yuko Sawada
Yuko Sawada