Title:
ESD SUPPRESSION STRUCTURE
Document Type and Number:
Japanese Patent JP2019008946
Kind Code:
A
Abstract:
To provide an ESD suppression structure capable of preventing malfunction or damage of an electronic circuit from occurring due to ESD secondary discharge current flowing into a printed board GND from a conductor of an ESD application target.SOLUTION: A conductor 1 of an ESD application target and an inside conductor 3 having a connection with a printed board GND are connected via a sheet-like suppression member 5 which exhibits a resistance value to be in a connected state only when being applied with high voltage, and thereby ESD current is reduced and effects on the printed board GND is reduced, so that ESD resistance can be improved.SELECTED DRAWING: Figure 1
Inventors:
ABE NORIO
Application Number:
JP2017122456A
Publication Date:
January 17, 2019
Filing Date:
June 22, 2017
Export Citation:
Assignee:
MITSUBISHI ELECTRIC ENG
International Classes:
H05F3/02; H05F3/04; H05K9/00
Domestic Patent References:
| JP2001345161A | 2001-12-14 | |||
| JP2001035632A | 2001-02-09 | |||
| JPH1154237A | 1999-02-26 | |||
| JP2011228068A | 2011-11-10 | |||
| JPH0360842U | 1991-06-14 | |||
| JP2006221919A | 2006-08-24 |
Attorney, Agent or Firm:
Michiharu Soga
Kajinami order
Shunichi Ueda
Junichiro Yoshida
Takahiro Matsuoka
Bessho Kobo
Akihiro Sato
Kajinami order
Shunichi Ueda
Junichiro Yoshida
Takahiro Matsuoka
Bessho Kobo
Akihiro Sato