Title:
DISPLAY DEVICE
Document Type and Number:
Japanese Patent JP2019032557
Kind Code:
A
Abstract:
To provide a display device that has a circuit configuration element designed to contribute to a high accuracy.SOLUTION: The present invention includes: a thin film transistor DRT on a surface of a substrate B1, the transistor DRT having a semiconductor layer AS and a gate electrode GT; a source electrode ST connected to a region of the semiconductor layer AS which is doped with impurities; a pixel electrode AD connected to the source electrode ST; and a metal layer MT below the pixel electrode AD. The source electrode GT, the source electrode ST, the metal layer MT, and the pixel electrode AD are sequentially overlapped in a planar view in descending order of closeness to the substrate B1.SELECTED DRAWING: Figure 5A
Inventors:
TABATA HIROSHI
KIMURA HIROYUKI
SHIBUSAWA MAKOTO
NAKAYAMA HIROSHI
MORITA TETSUO
UMEDA YUTAKA
KIMURA HIROYUKI
SHIBUSAWA MAKOTO
NAKAYAMA HIROSHI
MORITA TETSUO
UMEDA YUTAKA
Application Number:
JP2018208596A
Publication Date:
February 28, 2019
Filing Date:
November 06, 2018
Export Citation:
Assignee:
JAPAN DISPLAY INC
International Classes:
G09F9/30; H01L21/336; H01L27/32; H01L29/786; H01L51/50; H05B33/26; H05B33/28
Domestic Patent References:
| JP2010020926A | 2010-01-28 | |||
| JP2009253180A | 2009-10-29 | |||
| JP2014085385A | 2014-05-12 | |||
| JP2008287135A | 2008-11-27 | |||
| JP2013162120A | 2013-08-19 |
Foreign References:
| US20140302622A1 | 2014-10-09 |
Attorney, Agent or Firm:
Haruka International Patent Office