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Title:
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
Document Type and Number:
Japanese Patent JP2019102761
Kind Code:
A
Abstract:
To provide a semiconductor device and a semiconductor device manufacturing method which can easily make breakdown voltage of a termination region higher than breakdown voltage of an active region without increasing a length of the termination region.SOLUTION: A semiconductor device has an active region 200 where current flows and a termination structure part 300. The semiconductor device comprises a first conductivity type first semiconductor layer 2 provided on a surface of a first conductivity type semiconductor substrate 1; a lower parallel pn structure 20a provided on a surface of the first semiconductor layer 2; an upper parallel pn structure 20b provided on a surface of the lower parallel pn structure 20a in the termination structure part 300; and a second conductivity type first semiconductor region 5 provided on a surface of the lower parallel pn structure 20a in the active region 200. A width of an upper second column 14 is wider than a width of a lower second column 4a; and an interval between the upper second columns 14 is wider than an interval between the lower second columns 4a; and a film thickness of the upper second column 14 is larger than a film thickness of the first semiconductor region 5.SELECTED DRAWING: Figure 1

Inventors:
MAEDA RYO
Application Number:
JP2017235612A
Publication Date:
June 24, 2019
Filing Date:
December 07, 2017
Export Citation:
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Assignee:
FUJI ELECTRIC CO LTD
International Classes:
H01L29/78; H01L21/336; H01L29/06; H01L29/12
Domestic Patent References:
JP2015505155A2015-02-16
JP2015070184A2015-04-13
JP2006073740A2006-03-16
JP2006114866A2006-04-27
Attorney, Agent or Firm:
Akinori Sakai