Title:
SEMICONDUCTOR PACKAGE
Document Type and Number:
Japanese Patent JP2019169512
Kind Code:
A
Abstract:
To provide a semiconductor package that can improve adhesion to a molding material, relieve stress applied to a semiconductor chip and its joint, and suppress an increase in electrical resistance of a conductive clip.SOLUTION: A semiconductor package includes a mounting frame 10, a semiconductor chip including a semiconductor element and mounted on the mounting frame 10, and a plate-shaped conductive clip 30 disposed above the mounting frame 10 across the semiconductor chip, and a slit 300 is formed that penetrates the conductive clip 30 in the thickness direction and in which the direction of the main current flowing through the conductive clip 30 is parallel to the longitudinal direction in accordance with the operation of the semiconductor element.SELECTED DRAWING: Figure 1
Inventors:
YAMAMOTO ISAO
SHINOZAKI YUICHI
SHINOZAKI YUICHI
Application Number:
JP2018054201A
Publication Date:
October 03, 2019
Filing Date:
March 22, 2018
Export Citation:
Assignee:
ROHM CO LTD
International Classes:
H01L21/60; H01L25/07; H01L25/18
Attorney, Agent or Firm:
Hidekazu Miyoshi
Keishin Terayama
Keishin Terayama