Title:
SOLID-STATE IMAGING ELEMENT AND METHOD OF MANUFACTURING THE SAME
Document Type and Number:
Japanese Patent JP2019204840
Kind Code:
A
Abstract:
To provide a solid-state imaging element capable of suppressing a short circuit between impurity diffusion regions having opposite conductivity types in a case where position deviation occurs in forming contact plugs.SOLUTION: A solid-state imaging element according to one embodiment comprises a semiconductor substrate, first and second photodiodes, first and second element isolation regions, first and second protection films, a pixel transistor, and an interlayer insulating film. The first and second photodiodes are formed inside the semiconductor substrate, and are adjacent to each other separately from each other in a plan view. The first and second element isolation regions surround first and second photodiodes in a plan view, respectively. The first and second protection films are formed on a first surface of the semiconductor substrate. The pixel transistor has first and second impurity diffusion regions.SELECTED DRAWING: Figure 2
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Inventors:
GOTO YOTARO
KUNIKIYO TATSUYA
SATO HIDENORI
TAKAHASHI FUMITOSHI
KUNIKIYO TATSUYA
SATO HIDENORI
TAKAHASHI FUMITOSHI
Application Number:
JP2018097793A
Publication Date:
November 28, 2019
Filing Date:
May 22, 2018
Export Citation:
Assignee:
RENESAS ELECTRONICS CORP
International Classes:
H01L27/146
Attorney, Agent or Firm:
Fukami patent office