Title:
PRINTED WIRING BOARD AND MANUFACTURING METHOD THEREOF
Document Type and Number:
Japanese Patent JP2020080353
Kind Code:
A
Abstract:
To provide a printed wiring board in which peeling does not occur between resin insulating layers having different thermal expansion coefficients.SOLUTION: A first via conductor (60F) is formed on a first resin insulating layer (50F) having a high thermal expansion coefficient, and a second via conductor (160F1) is formed on a second resin insulating layer (150F) having a low thermal expansion coefficient. Then, in order to form a skip via conductor 160F2 penetrating the first resin insulating layer 50F and the second resin insulating layer 150F, and no peeling occurs at the interface of the first resin insulating layer 50F having a high thermal expansion coefficient and the second resin insulating layer 150F having a low thermal expansion coefficient.SELECTED DRAWING: Figure 1
Inventors:
ISHIHARA TERUYUKI
Application Number:
JP2018212334A
Publication Date:
May 28, 2020
Filing Date:
November 12, 2018
Export Citation:
Assignee:
IBIDEN CO LTD
International Classes:
H05K3/46
Attorney, Agent or Firm:
Akito Tashita