Title:
SERIES MULTIPLE INVERTER DEVICE
Document Type and Number:
Japanese Patent JP2020088961
Kind Code:
A
Abstract:
To output a voltage according to a voltage command value to suppress harmonics in a series multiple inverter device.SOLUTION: First to fourth inverter units INV1 to INV4 respectively convert DC voltages of multiple smoothing capacitors C1 to C4 into AC voltages. Output sides of the first to fourth inverter units INV1 to INV4 are connected in series and output a constant frequency. A pulse width modulation circuit compares a voltage command value Vref with gate thresholds Thg1 to Thg4 set to different values for the respective inverter units INV1 to INV4 to generate gate signals of semiconductor switching elements of the first to fourth inverter units INV1 to INV4. A gate threshold value setting unit sorts the gate thresholds Thg1 to Thg4 to values with low absolute values in descending order of a DC voltage Vdc or a unit output voltage Vo.SELECTED DRAWING: Figure 1
Inventors:
DOI KEIICHIRO
Application Number:
JP2018216925A
Publication Date:
June 04, 2020
Filing Date:
November 20, 2018
Export Citation:
Assignee:
MEIDENSHA ELECTRIC MFG CO LTD
International Classes:
H02M7/49
Attorney, Agent or Firm:
Hiromichi Kobayashi
Tomioka Kiyoshi
Uzawa Hidehisa
Tomoyuki Ota
Tomioka Kiyoshi
Uzawa Hidehisa
Tomoyuki Ota