Title:
SUBSTRATE STRUCTURE INCLUDING EMBEDDED SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD FOR THE SAME
Document Type and Number:
Japanese Patent JP2021141310
Kind Code:
A
Abstract:
To provide a technique for an embedded substrate including at least one active or passive electronic component in a conductive layer of the substrate.SOLUTION: A substrate structure 100 includes a carrier, a dielectric layer 31 on the carrier, an organic core layer p50 patterned in the dielectric layer, and a conductive veer 21v. The patterned organic core layer sections a passage extending in the dielectric layer to the carrier. The conductive veer extends through the passage to the carrier without a contact with the patterned organic core layer.EFFECT: The conductive layer facilitates the electric mutual connection or signal transmission of an embedded semiconductor device 40. The size of the package of the embedded substrate is reduced, the power density is increased, and the device performance is improved.SELECTED DRAWING: Figure 1
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Inventors:
CHEN JIAN FAN
LIAO YU-JU
YANG CHU-JIE
SHIH CHENG-HUNG
LIAO YU-JU
YANG CHU-JIE
SHIH CHENG-HUNG
Application Number:
JP2020199709A
Publication Date:
September 16, 2021
Filing Date:
December 01, 2020
Export Citation:
Assignee:
ADVANCED SEMICONDUCTOR ENG
International Classes:
H05K3/46; H01L23/12
Domestic Patent References:
| JPH03285382A | 1991-12-16 | |||
| JP2007538389A | 2007-12-27 | |||
| JP2009544153A | 2009-12-10 | |||
| JP2009099615A | 2009-05-07 | |||
| JP2012138528A | 2012-07-19 |
Foreign References:
| US20050121768A1 | 2005-06-09 |
Attorney, Agent or Firm:
Seiichi Inoue