Title:
【発明の名称】電子装置用ハウジング
Document Type and Number:
Japanese Patent JP2505739
Kind Code:
B2
Abstract:
The invention relates to a housing for an electronic device including a ceramic substrate 120 on which a multilayer circuit 110 is deposited by screen-printing. The circuit serves to bring about the connection between the terminals 7 of the electronic device and mounting pins 2 of the housing, which are provided in metallized holes in the substrate. The holes are provided with conducting rings (11 and 12) by means of screen-printing the conducting layers are formed from a compound which can be screen-printed and which comprises, at least, copper and a vitreous-crystalline material. This compound is to be fired in a neutral atmosphere at a temperature which is lower than the melting temperature of copper. Insulating layers are formed from a vitreous-crystalline screen-printable compound which must be fired in a neutral atmosphere at a temperature which is suited for the conducting layers with the insulating compound having a coefficient of expansion which is adapted to that of the substrate up to its firing temperature. The last layer of the circuit is a protective insulating vitreous-crystalline layer. The pins have the shape of a shank provided with a flat head, which flat head rests on the ring which is located at one of the faces of the substrate, and the pins are fixed by means of a metal alloy which is compatible with the metal coating of the holes and conducting rings with the melting temperature of the alloy being substantially the same or lower than the firing temperature of the circuit layers. The terminals of the electronic device located on the substrate are connected to the ends of the conductors by means of flexible wires, with the ends being left free during manufacture of the multilayer circuit. The electronic device is protectred by a cap.
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Inventors:
MISHERU JANNKUROODO MONIE
Application Number:
JP28765685A
Publication Date:
June 12, 1996
Filing Date:
December 21, 1985
Export Citation:
Assignee:
FUIRITSUPUSU EREKUTORONIKUSU NV
International Classes:
H05K3/46; H01L23/057; H01L23/06; H01L23/12; H01L23/48; H01L23/482; H01L23/498; H01L23/50; H01L23/538; H05K3/12; (IPC1-7): H01L23/12; H01L23/50
Domestic Patent References:
| JP50148862A | ||||
| JP51119973A | ||||
| JP5382825A | ||||
| JP5977231U |
Attorney, Agent or Firm:
Akihide Sugimura (1 outside)