Title:
【発明の名称】樹脂封止型半導体装置
Document Type and Number:
Japanese Patent JP2531817
Kind Code:
B2
Abstract:
PURPOSE:To lessen a package in warpage as a whole by a method wherein an insulator which induces a warpage in the package is provided onto the surface of the inner lead of a lead frame further from the side face of the package, where a resin-sealed semiconductor device is buried in a sealing resin in such a manner the gap between the upsides of the sealing resin and the semiconductor device is different from that between the undersides of the sealing resin and the semiconductor device. CONSTITUTION:An inner lead 1b is buried nearly at the center of a sealing resin 5 in a thicknesswise direction, and a plate-like rectangular insulator 7 is pasted on the upside of the inner lead 1b through the intermediary of an insulating adhesive agent. In a buried semiconductor chip 3 sealed up with the resin 5, as an upper burial depth S1 is larger than a lower burial depth S2, the upper resin shrinkage stress is higher than the lower shrinkage stress, in result a warpage protruding downward is induced. Then, a warpage protrud ing in the opposite direction is induced in the buried inner lead 16, so that the warpage a of a package can be restrained as small as possible taking advan tage of forces which act in opposed directions.
Inventors:
KOBAYASHI KAZUTO
Application Number:
JP2801590A
Publication Date:
September 04, 1996
Filing Date:
February 07, 1990
Export Citation:
Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
H01L23/50; H01L23/28; (IPC1-7): H01L23/28; H01L23/50
Domestic Patent References:
| JP63158857A | ||||
| JP6352451A | ||||
| JP61207038A | ||||
| JP58191457A | ||||
| JP6236547U |
Attorney, Agent or Firm:
Kazuo Sato (2 outside)