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Title:
【発明の名称】半導体集積回路装置
Document Type and Number:
Japanese Patent JP2553544
Kind Code:
B2
Abstract:
A semiconductor device including interconnection lines for connecting element regions is disclosed. Each of interconnection lines is comprised of a first layer consisting essentially of aluminum, an alumina film formed on the first layer and a second layer containing silicon and deposited on the alumina film. Refractory metal silicide such as tungsten silicide, molybdenum silicide, titanium silicide, tantalum silicide and chromium silicide is favorably employed as the second layer. Hillcock formation and electromigration are thus prevented or suppressed.

Inventors:
YOSHIKAWA KIMIMARO
Application Number:
JP5232487A
Publication Date:
November 13, 1996
Filing Date:
March 06, 1987
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H01L23/52; H01L21/3205; H01L23/532; (IPC1-7): H01L21/3205
Domestic Patent References:
JP5885548A
JP5771131A
JP60214543A
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)