Title:
【発明の名称】半導体装置
Document Type and Number:
Japanese Patent JP2564856
Kind Code:
B2
Abstract:
PURPOSE:To improve a semiconductor device in which an operating layer employs a GaAs formed over a silicon substrate, by forming the operating layer of GaAs which serves as the main section of the semiconductor device, on a buffer layer of GaAs which is formed over the semiconductor substrate, through a specific insulating layer. CONSTITUTION:A buffer layer 13 of GaAs which is formed over a silicon substrate 20, and an operating layer 11 which is formed over the buffer layer 13 and serves as the main section of a semiconductor device, are provided, respectively. Moreover, an insulating layer 12, which is formed between the buffer layer 13 and the operating layer 11 to electrically insulate the buffer layer 13, and consists of one out of the following materials; (a) an AlxGa1-xAs, (b) a GaAs which has the conductivity type so that a potential barrier is formed against the GaAs of the operating layer 11, (c) a ZnSe, and (d) a superlattice comprising GaAs, is provided. For example, in the case of the preparation of a hall IC, a buffer layer 13 of GaAs, and an insulating layer 12 of Al0.3Ga0.7 As are in this order formed on a P type silicon layer 22. Further, an operating layer 11 of N type GaAs, which is to be a magneto-sensitive layer in the hall element, is formed on the insulating layer 12.
Inventors:
INUZUKA HAJIME
SUZUKI YASUTOSHI
AWANO NAOMI
KAWAKITA HARUO
SUZUKI YASUTOSHI
AWANO NAOMI
KAWAKITA HARUO
Application Number:
JP27859687A
Publication Date:
December 18, 1996
Filing Date:
November 02, 1987
Export Citation:
Assignee:
NIPPON DENSO CO
International Classes:
H01L21/761; H01L21/20; H01L21/76; H01L27/15; H01L27/22; H01L31/04; H01S5/00; H01S5/026; (IPC1-7): H01L21/20; H01L21/761; H01L27/22
Attorney, Agent or Firm:
Fujitani Osamu