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Title:
【発明の名称】集積回路チップ・キャリア
Document Type and Number:
Japanese Patent JP2570498
Kind Code:
B2
Abstract:
An integrated circuit chip carrier assembly, comprising a semiconductor device (10) having interconnection pads (14) disposed on an active surface (12) of the device. The device (10) is attached by means of electrically conducting bumps (26) to a circuitry pattern (18) on a first side of a circuit carrying substrate (16). The substrate is typically an aramid reinforced organic resin, such as epoxy. The circuitry (18, 20) is electrically connected by conductive through-holes (22) to an array of solder pads on a second side of the substrate. Some or all of the through-holes (22) are covered by the device. The overall length and width of the circuit carrying substrate (16) are each a maximum of about 0.15 inches greater than the equivalent dimensions of the device (10), creating a carrier that is only slightly larger than the semiconductor device itself.

Inventors:
Thompson, Kenny Earl
Banagher, King Shuk
Murren, William Be the Third
Application Number:
JP50004993A
Publication Date:
January 08, 1997
Filing Date:
April 23, 1992
Export Citation:
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Assignee:
MOTOROLA INCORPORATED
International Classes:
H01L21/56; H01L23/32; H01L23/498; H01L23/12; (IPC1-7): H01L23/32; H01L23/12
Domestic Patent References:
JP61279164A
Other References:
【文献】米国特許4893172(US,A)
Attorney, Agent or Firm:
Masanori Honjo (1 person outside)