Title:
【発明の名称】ページモード動作可能なメモリー装置及びメモリーシステムのページモード動作方法
Document Type and Number:
Japanese Patent JP2595220
Kind Code:
B2
Abstract:
A memory device is disclosed which is comprised of a plurality of memory boards each having at least one memory bank associated therewith with each memory bank including a plurality of memory elements addressable by rows and columns. In page-mode operation of the memory device, all of the memory elements receive the active row address strobe signal RAS. The RAS signal is maintained active as long as the memory is to remain in page-mode operation. Memory address information is decoded to select a memory board and a memory bank from the plurality of memory boards and to enable the memory elements to permit either a read or a write operation without the need for performing additional address strobe cycles.
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Inventors:
Taylor, Billy Kennis
The Ames, Larry Cliff Aether
The Ames, Larry Cliff Aether
Application Number:
JP50482586A
Publication Date:
April 02, 1997
Filing Date:
September 08, 1986
Export Citation:
Assignee:
NC International Inc.
International Classes:
G11C11/401; G06F12/02; G06F12/06; G11C7/00; G11C7/10; G11C8/00; G11C8/12; G11C8/18; (IPC1-7): G11C11/401; G11C7/00
Domestic Patent References:
| JP59144966A | ||||
| JP57208686A |
Attorney, Agent or Firm:
Yoshiaki Nishiyama