Title:
【発明の名称】パターン発生器
Document Type and Number:
Japanese Patent JP2602997
Kind Code:
B2
Abstract:
A pattern generator includes a control unit, an address generation unit, and a data memory unit. The control unit has a plurality of control memories for storing information of the scanning order of addresses, the control unit outputting an address in accordance with the information stored in the control memories. The address generation unit has a plurality of address control memories for storing information used for controlling to generate addresses, the address control memories being provided in correspondence with the control memories, a data multiplexer for selecting and outputting the information outputted from the plurality of address control memories, and an address control unit for controlling to generate the addresses in accordance with the information outputted from the data multiplexer, the address generation unit outputting the addresses generated upon control by the address control unit. The data memory unit stores test pattern data to be supplied to an object to be measured, the data memory unit being accessed in accordance with the addresses outputted from the address generation unit, and outputting the test pattern data at the addresses.
Inventors:
Satoshi Shirasaka
Application Number:
JP457791A
Publication Date:
April 23, 1997
Filing Date:
January 18, 1991
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
G01R31/319; G01R31/3183; H03K3/78; H04M3/24; H04Q11/04; (IPC1-7): G01R31/3183
Domestic Patent References:
| JP23147B2 | ||||
| JP311435B2 |
Attorney, Agent or Firm:
Kazuo Sato (3 others)