Title:
【発明の名称】不揮発性メモリ装置
Document Type and Number:
Japanese Patent JP2646591
Kind Code:
B2
Abstract:
PURPOSE:To highly integrated a nonvolatile memory by forming a floating gate electrode on the sidewall of a step, so forming a control gate electrode to cover the floating gate electrode, and forming its channel region on the sidewall of the step. CONSTITUTION:A channel region is formed on the protrusion 11 of the sidewall 12 of a step in such a manner that the direction of its channel length is perpendicular to the main face 10a of a substrate. Since a floating gate electrode 16 is formed on the sidewall 12 of the step and a control gate electrode 18 covers the electrode 16, the transistor of a memory cell becomes small in its occupying area in its plane. Thus, a memory can be easily highly integrated.
Inventors:
NODA MASANORI
NAKAMURA AKIHIRO
NAKAMURA AKIHIRO
Application Number:
JP29908387A
Publication Date:
August 27, 1997
Filing Date:
November 27, 1987
Export Citation:
Assignee:
SONII KK
International Classes:
H01L27/112; H01L21/8246; H01L21/8247; H01L27/10; H01L27/115; H01L29/78; H01L29/788; H01L29/792; (IPC1-7): H01L21/8247; H01L27/115; H01L29/788; H01L29/792
Domestic Patent References:
| JP61256673A | ||||
| JP62269363A | ||||
| JP6453577A | ||||
| JP645071A | ||||
| JP63285966A |
Attorney, Agent or Firm:
Akira Koike (2 outside)