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Title:
【発明の名称】半導体装置及び半導体記憶装置
Document Type and Number:
Japanese Patent JP2768719
Kind Code:
B2
Abstract:
PURPOSE:To obtain a semiconductor device having a thin film transistor(TFT) wherein integration density is high and electric characteristics are superior, by arranging a channel, at least a part of said channel, in a semiconductor layer almost vertical to a semiconductor layer, and making the direction of a current flowing in the channel nearly parallel with the substrate. CONSTITUTION:A gate electrode 30 sandwiches a gate insulating film 91, and surrounds a thin film semiconductor layer; a thin film part which is not covered with a gate 30 is a source electrode 40 and a drain electrode 50; the thin film semiconductor layer which is sandwiched by the gate 30 between the electrodes 40, 50 constitutes a channel in the direction parallel with the surface of a substrate 10. Since the channel is surrounded by an insulating layer 20 and the gate insulating film 91, the channel is electrically isolated from the substrate 10. The gate electrode 30 exerts field effect on the channel via a gate insulating film 91, and performs three-terminal field effect type transistor actions by a source electrode 40 and a drain electrode 50. Hence excellent electric characteristics can be obtained by the gate, and a finely miniaturized FET can be constituted in a plane view.

Inventors:
Hisamoto Dai
Tohru Kaga
Kimura Shinichiro
Masahiro Moiwa
Haruhiko Tanaka
Atsushi Hiraiwa
Takeda Eiji
Application Number:
JP4540389A
Publication Date:
June 25, 1998
Filing Date:
February 28, 1989
Export Citation:
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Assignee:
株式会社日立製作所
International Classes:
H01L29/73; H01L21/331; H01L21/336; H01L21/339; H01L21/762; H01L21/8222; H01L21/8238; H01L21/8242; H01L21/8248; H01L21/8249; H01L27/06; H01L27/10; H01L27/108; H01L27/11; H01L29/10; H01L29/423; H01L29/762; H01L29/78; H01L29/786; (IPC1-7): H01L29/78; H01L21/8242; H01L27/108
Domestic Patent References:
JP5710973A
JP648670A
JP6427270A
Attorney, Agent or Firm:
Akio Takahashi (1 person outside)



 
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