Title:
【発明の名称】半導体装置
Document Type and Number:
Japanese Patent JP2786390
Kind Code:
B2
Abstract:
A balanced driver circuit (28) essentially eliminates inductive noise without a power dissipation penalty, and is similar to a conventional balanced driver circuit except that the circuit is impedance matched at both ends and has resistors (44,46) connected in series with the outputs of the transistors (40,42) in the chip. The resistors are equal in value to a termination resistor (48,50) less the output impedance (R0). of the transistors. The impedance between the pair of signal leads (32,34), referred to as the primary and secondary leads, is equal to the sum of the termination resistors (48,50). The current traversing the secondary lead has the same amplitude, but the opposite sign as the current traversing the primary lead. Thus, there is negligible current return through the common ground leads.
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Inventors:
ATEIRIO JOSEFU RAINERU
Application Number:
JP16325393A
Publication Date:
August 13, 1998
Filing Date:
June 08, 1993
Export Citation:
Assignee:
EI TEI ANDO TEI CORP
International Classes:
H03F1/26; H03K19/003; H03K19/013; H03K19/018; H03K19/086; H04L25/02; (IPC1-7): H03K19/018; H03K19/013; H03K19/086; H04L25/02
Domestic Patent References:
| JP4249945A | ||||
| JP3171849A | ||||
| JP2156723A | ||||
| JP385015A | ||||
| JP6352322U |
Attorney, Agent or Firm:
Hirofumi Mimata