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Title:
【発明の名称】電子部品搭載用多層ボンディング基板
Document Type and Number:
Japanese Patent JP2847319
Kind Code:
B2
Abstract:
PURPOSE:To make a multilayered bonding board compact as a whole and to enhance a conductor pattern in degree of freedom of wiring by a method wherein the inner ends of conductor patterns are arranged coincidentally near an electronic component mounting section, and an opening through which a bonding wire is inserted is provided to each of auxiliary boards. CONSTITUTION:The inner ends of conductor patterns 12 are arranged coincidentally near an electronic component mounting section 13, and an opening 14 is provided to each of auxiliary boards which serve as an upper layer. An electronic component 20 is directly connected to the outermost conductor pattern 12 and connected to the inner conductor patterns 12 with bonding wire 30 through the openings 14. By this setup, conductor patterns are formed in two or more layers, and a board can be formed compact as a whole, and conductor patterns can be improved in degree of freedom of wiring.

Inventors:
MORI SHIGEKI
YANAGAWA YOJI
HORIBA YASUHIRO
YABE SHUICHI
Application Number:
JP12988790A
Publication Date:
January 20, 1999
Filing Date:
May 18, 1990
Export Citation:
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Assignee:
IBIDEN KK
International Classes:
H05K1/14; H01L21/60; H05K3/46; H05K1/00; H05K3/40; (IPC1-7): H01L21/60
Domestic Patent References:
JP63263736A
JP60110128A
JP4286148A
JP437057A
JP217839U
Attorney, Agent or Firm:
Hironori Takenori