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Title:
【発明の名称】ピーク検出回路
Document Type and Number:
Japanese Patent JP2856744
Kind Code:
B2
Abstract:
A device and method for detecting a peak level of an input signal. The input signal is amplified by a first amplifier. A switching signal corresponding to an output signal from the first amplifier is generated and a held peak level of the switching signal is fed back to the first amplifier negatively. Also, the switching signal is amplified by a second amplifier. A compensator generates a bias compensating signal for supplying to the first and second amplifiers to offset for the current drain that would otherwise occur.

Inventors:
KINOSHITA OSAMU
Application Number:
JP30578388A
Publication Date:
February 10, 1999
Filing Date:
December 02, 1988
Export Citation:
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Assignee:
TOSHIBA KK
International Classes:
G01R19/04; H03G3/30; G11C27/02; H03K5/1532; (IPC1-7): H03G3/30
Domestic Patent References:
JP62151004A
JP61155865A
JP60209998A
JP61107171A
JP61262669A
JP61155865A
Attorney, Agent or Firm:
Takehiko Suzue (2 outside)



 
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