Title:
【発明の名称】論理シミュレーション装置
Document Type and Number:
Japanese Patent JP2923543
Kind Code:
B2
Abstract:
PURPOSE:To attain efficient simulation and to make it possible to apply this logical simulation device to a more large scale circuit by deleting elements requiring no logical inspection simulation and reducing the number of elements in a logical circuit to be simulated. CONSTITUTION:The logical simulation device is provided with a means 2 for detecting connecting relation with other elements by allowing a probe to touch each element in a real circuit corresponding to a logical circuit to be simulated, judging the necessity/unnecessity of logical inspection simulation based upon the detected result and detecting an element requiring no logical inspection simulation, a means 3 for deleting (reducing) the unnecessary element detected by the means 2 from the logical circuit, and a logical inspection simulation means 4 for executing the logical inspection of the logical circuit from which the unnecessary element is deleted.
Inventors:
YOSHIDA NOBURO
Application Number:
JP46691A
Publication Date:
July 26, 1999
Filing Date:
January 08, 1991
Export Citation:
Assignee:
MITSUBISHI DENKI KK
International Classes:
G06F11/25; G06F11/26; G06F17/50; (IPC1-7): G06F17/50
Domestic Patent References:
| JP1197868A | ||||
| JP6228873A | ||||
| JP3100868A |
Attorney, Agent or Firm:
Tono Kono