Title:
【発明の名称】半導体装置
Document Type and Number:
Japanese Patent JP2958098
Kind Code:
B2
Abstract:
PURPOSE:To prevent a wire bonded part from being coated with solder and to improve reliability and productivity with wire bonding secured by surface- treating only wire bonded parts and the chip fixed part out of the surface of a die mount zone. CONSTITUTION:A chip fixed part and wire bonded parts are provided on a die mount zone 10 to weld and fix a chip 3 on. Next, the whole surface of the die mount zone 10 is nickel-plated. Then, Au plated parts 11a, 11b are formed on wire bonded parts and the chip fixed part, respectively, and a chip 3 is heated and fixed with solder. This reduces outflow of solder outside the chip 3 due to scrubbing during bonding and prevents it from reaching wire bonded parts because of a high resistance of friction at a surface-untreated nickel-plated part 12, thereby wire bonding satisfactorily to wire bonded parts of wires 8 and inner leads.
Inventors:
YOSHIDA TAKASHI
Application Number:
JP29790990A
Publication Date:
October 06, 1999
Filing Date:
November 02, 1990
Export Citation:
Assignee:
FUJITSU KK
International Classes:
H01L21/60; H01L21/52; (IPC1-7): H01L21/52; H01L21/60
Domestic Patent References:
| JP53128283A | ||||
| JP1251624A | ||||
| JP6193654A | ||||
| JP3248541A | ||||
| JP6268239U |
Attorney, Agent or Firm:
Tadahiko Ito (2 outside)