Title:
【発明の名称】通信制御装置
Document Type and Number:
Japanese Patent JP2972613
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To reduce a circuit scale without increasing the number of connection detection signals even when the mounted number is increased by interlocking switching of line interface sections having a plurality of different standards with cable connection. SOLUTION: A line interface detection section detects n-sets of terminals Ti (i=1-n) going to a ground level when a cable is connected by using a small number of connection detection signals. Fig. (a) shows the case of n=4 and Fig. (b) indicates the case of n=8. Identification information in m-bit (let a minimum integer (m) satisfying a relation of 2 >=n be (m)) is assigned to the n-sets of the terminal Ti, a connection detection signal corresponding to each bit is generated by m-sets of pull-up resistors and given to a line interface detection section 5a (5b). The terminal T1 where all bits of the identification information are set to '0' has no connection and the terminals T2, T4 (T2, 6, 8) where only a single bit is at '1' are connected directly to a corresponding pull-up resistor and the terminal T3 (T3, 4, 5, 7) where a plurality of bits are set to '1' is connected to a plurality of corresponding pull-up resistors via a diode.
Inventors:
BANBA KAZUHIRO
Application Number:
JP33705296A
Publication Date:
November 08, 1999
Filing Date:
December 17, 1996
Export Citation:
Assignee:
NIIGATA NIPPON DENKI KK
International Classes:
G06F1/18; G06F13/00; H04L69/14; (IPC1-7): H04L29/04; G06F1/18; G06F13/00; H04L29/10
Domestic Patent References:
| JP4108243A |
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)