Title:
【発明の名称】超電導トランジスタ並びにその製造方法
Document Type and Number:
Japanese Patent JP2983546
Kind Code:
B2
Abstract:
PURPOSE:To obtain a transistor structure at a very low temperature by constructing collector, base, and emitter regions in such a way that a substrate having superconductive composition which is in the state of a semiconductor phase acts as a collector and the superconductor phase acts as a base and then a superconductive layer in contact with the superconductor phase through an insulating layer thin enough to cause a tunneling phenomenon in the superconductor phase acts as an emitter. CONSTITUTION:A superconductor phase 2 which makes up a base region at a part of a substrate is provided at the surface of the substrate 1 having superconductive composition which is in the state of a semiconductor phase. An emitter region is obtained by bringing a superconductor layer 6 into contact with the above superconductor phase 2 through an insulating layer 3 having a thickness which is thin enough to give rise to a tunneling phenomenon; besides, the substrate 1 having superconductive composition which is in the state of the semiconductor phase acts as a collector. A superconductive transistor which has a high gain as a result of an intensified non-linear system and operates at a high speed is thus obtained.
Inventors:
JINNO MARUO
USUKI TATSURO
SUZUKI HIROSHI
YOSHISATO MASANOBU
NAKANO SHOICHI
USUKI TATSURO
SUZUKI HIROSHI
YOSHISATO MASANOBU
NAKANO SHOICHI
Application Number:
JP27969388A
Publication Date:
November 29, 1999
Filing Date:
November 04, 1988
Export Citation:
Assignee:
SANYO DENKI KK
International Classes:
H01B12/06; H01B13/00; H01L39/22; H01L39/24; (IPC1-7): H01L39/22; H01L39/24
Domestic Patent References:
| JP62281481A | ||||
| JP61206279A | ||||
| JP63244526A |
Other References:
【文献】J.J.A.P.,Vol.26,No.5,MAY.1987,pp.L785-L787
Attorney, Agent or Firm:
Koji Yasutomi (1 person outside)