Title:
【発明の名称】可変利得増幅回路
Document Type and Number:
Japanese Patent JP3082655
Kind Code:
B2
Abstract:
In a differential amplifier formed with first and second transistors having emitters connected to each other via a resistor, an input signal is supplied to a base of the first transistor. On the other hand, to a base of the second transistor, an external constant voltage is supplied. In order to control the emitter current of the second transistor, a third transistor having a base supplied a control voltage is added. The emitter of the third transistor is commonly connected to the emitter of the second transistor in common, and a collector thereof is connected to a high power source voltage terminal. By varying at least one of the control voltage on the base of the third transistor and the constant voltage on the base of the second transistor, a gain of the circuit can be controlled. Also, the transistors are connected in single stage connection with respect to the power source, operation with the low power source voltage becomes possible.
Inventors:
Yoji Hirano
Application Number:
JP2083196A
Publication Date:
August 28, 2000
Filing Date:
February 07, 1996
Export Citation:
Assignee:
NEC
International Classes:
H03G3/10; H03F3/45; H03G1/00; H03H11/46; (IPC1-7): H03G3/10; H03F3/45
Domestic Patent References:
| JP6062711A | ||||
| JP63284913A | ||||
| JP56726A | ||||
| JP60196004A |
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)