Title:
【発明の名称】データ処理装置
Document Type and Number:
Japanese Patent JP3089427
Kind Code:
B2
Abstract:
PURPOSE:To execute a following instruction string before the instruction requiring plural machine cycles for the execution is ended by bringing down the execution forward in the case of executing following instruction strings. CONSTITUTION:When decoding the instruction which belongs to the instruction group requiring plural machine cycles for execution, a next instruction decoding holding means 106 temporarily holding the decoding of the next instruction is equipped. Against the instruction which belongs to the instruction group requiring plural machine cycles for execution, a sufficient condition preventing the generation of an exception condition accompanied by the execution is detected before the execution ends. When the fact that the exception condition accompanied by the execution is not generated is confirmed by a detection means 211, the holding of the next instruction decoding holding means 106 is decoded to decode and execute the following instruction without waiting for the end of the instruction which belongs to the instruction group requiring plural machine cycles for the execution. Thus, high-speed processing can be realized since the following instruction can be executed without waiting for the end of the execution of the instruction requiring plural machine cycles for execution.
Inventors:
Taku Nakano
Masahito Nakajima
Masahito Nakajima
Application Number:
JP25116090A
Publication Date:
September 18, 2000
Filing Date:
September 20, 1990
Export Citation:
Assignee:
Matsushita Electric Industrial Co., Ltd
International Classes:
G06F9/38; G06F7/00; G06F9/30; (IPC1-7): G06F9/38; G06F7/00; G06F9/30
Domestic Patent References:
| JP210427A |
Attorney, Agent or Firm:
Masamichi Matsuda