Title:
RECEIVER
Document Type and Number:
Japanese Patent JP3168610
Kind Code:
B2
Abstract:
PURPOSE: To reduce power consumption of the receiver by providing a discrimination error estimate device and a signal quality discrimination device to the receiver, applying power of an equalizer when the signal quality is deteriorated and disconnecting the power supply of the equalizer when not.
CONSTITUTION: An output of a demodulator 110 is compared with a predetermined threshold level at a discrimination device 120 and discriminated. A discrimination error estimate device 130 estimates an error in the discrimination device 120 by calculating the difference of the input and output of the device 120. A signal quality discriminator 140 uses a square circuit 141 to square a discrimination error and the result is integrated by an LPF 142 to estimate the signal quality. That is, when an output of the LPF 142 is large, a discrimination error is large and when an output of the LPF 142 is small, the error is small. An output of the discrimination device 140 is fed to an equalizer 150, and when the signal quality is deteriorated, power is supplied and an output of the discrimination device 120 is replaced with an output of the equalizer 150. When the signal quality is excellent, the power of the equalizer 150 is interrupted and the output of the discrimination device 120 is outputted as it is.
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Inventors:
Yukitsuna Furuya
Kazuhiro Okanogami
Akihisa Ushirokawa
Hideho Tomita
Kazuhiro Okanogami
Akihisa Ushirokawa
Hideho Tomita
Application Number:
JP15504291A
Publication Date:
May 21, 2001
Filing Date:
June 27, 1991
Export Citation:
Assignee:
NEC
International Classes:
H04B3/06; H04B1/16; H04B7/005; H04L25/03; H04L27/00; H04L27/01; (IPC1-7): H04B3/06; H04B7/005; H04L27/00
Domestic Patent References:
| JP2186839A | ||||
| JP2288425A | ||||
| JP391328A |
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)