Title:
【発明の名称】論理アレイの速い切換えを行なう回路と方法
Document Type and Number:
Japanese Patent JP3193712
Kind Code:
B2
Abstract:
PURPOSE: To increase the switching speed of a product line without increasing the power consumption of a device by sensing the logical state of an output and controlling a current passing the product line in response to the sensed state. CONSTITUTION: The current state of a matrix 15 outputted to a node 16 is inspected. When the current state is high, the succeeding state of the circuit is supposed to be low, a current passing a current source 20 is increased and the rise output of a switching circuit 22 is reduced. When the current state corresponds to a low logical level, the succeeding state of the circuit is supposed to be a high logical level, the current passing the current source 20 is reduced, the rise output of the circuit 22 is increased, and at the time of switching from low to high, the output of the matrix 15 is more quickly raised. Consequently the product line of a memory can be quickly switched in both directions from high to low and from low to high while reducing unnecessary power consumption.
Inventors:
Kevin M. Ovens
Jeffrey A. Knee House
Jeffrey A. Knee House
Application Number:
JP28054890A
Publication Date:
July 30, 2001
Filing Date:
October 18, 1990
Export Citation:
Assignee:
Texas Instruments Incorporated
International Classes:
H03K19/177; (IPC1-7): H03K19/177
Domestic Patent References:
| JP634713A | ||||
| JP6091722A | ||||
| JP55125725A |
Attorney, Agent or Firm:
Akira Asamura (3 outside)