Title:
【発明の名称】アクティブマトリックスディスプレイとその製造方法
Document Type and Number:
Japanese Patent JP3360831
Kind Code:
B2
Abstract:
Improved multilayer matrix line including inverted gate thin film matrix transistors to reduce defects in and enhance performance of matrix devices incorporating the transistors, including active matrix displays. The inverted gate line is formed in a multilayer metal structure deposited sequentially before patterning of a first bottom refractory layer, an aluminum layer and a second refractory layer for the gate structure. The aluminum layer is anodized adjacent the gate to prevent step coverage problems. A further improvement is provided when forming an active matrix display storage capacitor utilizing the multilayer gate structure.
Inventors:
Homeberg Scott H
Rajesh Swomi Nathan
Rajesh Swomi Nathan
Application Number:
JP53460197A
Publication Date:
January 07, 2003
Filing Date:
March 26, 1997
Export Citation:
Assignee:
Hyundai Electronics America
International Classes:
G09F9/30; G02F1/136; G02F1/1368; H01L21/336; H01L21/77; H01L21/84; H01L29/786; G02F1/1362; (IPC1-7): H01L29/786; G02F1/1368; G09F9/30; H01L21/336
Domestic Patent References:
JP786592A | ||||
JP715017A | ||||
JP6148683A | ||||
JP764109A | ||||
JP2285327A | ||||
JP6138486A | ||||
JP4338677A | ||||
JP651350A |
Attorney, Agent or Firm:
Minoru Nakamura (6 outside)