Title:
【発明の名称】チップ部品集合体の製造方法およびチップ部品の装着方法
Document Type and Number:
Japanese Patent JP3365058
Kind Code:
B2
Abstract:
By a manufacturing method including a process of supplying a connection-releasable connecting material (4) onto a surface of a plurality of chip parts (3) and a process of connecting the plurality of chip parts (3) by the connecting material (4), there is formed a chip assembly (1) comprised of the plurality of chip parts (3) connected with each other by means of the releasable connecting material (4). Further provided is a method of preparing the chip assembly (1), a process of releasing connection achieved by the connecting material (4) between a target chip part and an adjacent chip part, and a process of mounting the target chip part separated through releasing of the connection onto a board and soldering the same, thereby providing chip parts capable of easily coping with an increase of operation speed of chip parts on the process of mounting line, achieving an improved space efficiency, and suppressing waste of resources.
Inventors:
Junji Ikeda
Attack Yamazaki
Youichi Nakamura
Yoshifumi Kitayama
Attack Yamazaki
Youichi Nakamura
Yoshifumi Kitayama
Application Number:
JP15609394A
Publication Date:
January 08, 2003
Filing Date:
July 07, 1994
Export Citation:
Assignee:
Matsushita Electric Industrial Co., Ltd
International Classes:
H01L21/60; B65D73/02; H01G13/00; H05K3/34; H05K13/04; H05K3/30; (IPC1-7): H01G13/00; H01L21/60; H05K13/04
Domestic Patent References:
| JP6132182A | ||||
| JP5024784A | ||||
| JP5089242A | ||||
| JP6355530U |
Attorney, Agent or Firm:
Fumio Iwahashi (2 others)