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Title:
【発明の名称】混合解像度N次元オブジェクト空間
Document Type and Number:
Japanese Patent JP3385019
Kind Code:
B2
Abstract:
A modular, polymorphic network interconnecting a plurality of electronically reconfigurable devices via a modular, polymorphic interconnect, to permit a fixed, physical configuration of operating hardware devices to take on a plurality of logically addressable configurations. The modular, polymorphic interconnect further permits allocation and deallocation of selected electronically reconfigurable devices for a particular logically addressable configuration. The modular, polymorphic interconnect additionally permits the logical topology of selected electronically reconfigurable devices to be configured as at least one mixed-radix, N-dimensional network. The logical topology of mixed-radix, N-dimensional networks can be dynamically changed under control for a new configuration of logical addresses for selected electronically reconfigurable devices. The modular, polymorphic interconnect also permits one or more electronically reconfigurable devices to be selected from at least one logically related set of electronically reconfigurable devices, making the resulting network system particularly well suited for a variety of purposes related to resource management.

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Inventors:
Estes, Mark, Di.
Walker, John, Powell
Application Number:
JP50451592A
Publication Date:
March 10, 2003
Filing Date:
January 07, 1992
Export Citation:
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Assignee:
Walker-Este Corporation
International Classes:
G06F13/00; G06F17/50; G06F15/173; G06T15/00; G06T17/00; (IPC1-7): G06T15/00
Other References:
【文献】S.N,Srihari,Representation of Three Dimentional Digital Images,Computing Surveys,米国,ACM Press,1981年12月,Volume 13,No.4,(http://portal.acm.org/citation.cfm?id=356862&coll=ACM&dl=ACM&CFID=5542548&CFTOKEN=90341257)
Attorney, Agent or Firm:
Yoshikazu Tani (1 person outside)



 
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