Document Type and Number:
Japanese Patent JP3538841
Kind Code:
B2
Abstract:
A display device is provided with a matrix panel possessing multiple scanning lines, multiple data lines, and display elements that are driven by scanning signals and data signals; a scanning line drive circuit that simultaneously selects multiple scanning lines from among said scanning lines and applies scanning voltage possessing a specified selection voltage pattern; and a data line drive circuit that determines the voltage to be applied to said data lines based on the comparison between said selection voltage pattern and the display data which indicates ON/OFF of the display elements of said matrix panel, and that applies the determined voltage to said data lines. Multiple frame memory devices for accumulating said display data are provided, and the reading of the display data belonging to the first frame period from one of these frame memory devices is performed in parallel with the writing of the display data belonging to the second frame period to a memory device different from said single memory device.
Application Number:
JP51162596A
Publication Date:
June 14, 2004
Filing Date:
November 17, 1995
Export Citation:
International Classes:
G02F1/133; G09G1/00; G09G3/36; G09G5/399; (IPC1-7): G09G3/36; G02F1/133